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AMD® Zen

This page is valid for AMD® Zen.

Available performance monitors for the AMD® Zen microarchitecture

Counters available for each hardware thread

Fixed-purpose counters

The AMD® Zen architecture provides some free-running registers with minimal control that offer some specific events

Counter and events

Counter name Event name
FIXC0 INSTR_RETIRED_ANY
FIXC1 ACTUAL_CPU_CLOCK or APERF
FIXC2 MAX_CPU_CLOCK or MPERF

Note: It is not recommended to use the fixed counters in metrics as they sometimes do not provide accurate results. Instead of INSTR_RETIRED_ANY please use RETIRED_INSTRUCTIONs for the general-purpose counters

General-purpose counters

Commonly the AMD® Zen microarchitecture provides 4 general-purpose counters consisting of a config and a counter register.

Counter and events

Counter name Event name
PMC0 *
PMC1 *
PMC2 *
PMC3 *

Available Options

Option Argument Description Comment
edgedetect N Set bit 18 in config register
kernel N Set bit 17 in config register
threshold 8 bit hex value Set bits 24-31 in config register
invert N Set bit 23 in config register

Counters available for one hardware thread per socket

Power counter

The AMD® Zen microarchitecture provides measurements of the current power consumption through the RAPL interface.

Counter and events

Counter name Event name
PWR0 PWR_CORE_ENERGY
PWR1 PWR_PKG_ENERGY

Note: AMD Epyc CPUs partly provide zeros or wrong values for the PWR_CORE_ENERGY event

L3 cache counters

The AMD® Zen microarchitecture provides measurements for the last level cache segments.

Counter and events

Counter name Event name
CPMC0 *
CPMC1 *
CPMC2 *
CPMC3 *
CPMC4 *
CPMC5 *

Available Options

Option Argument Description Comment
tid 8 bit hex value Set bit 56-63 in config register
match0 4 bit hex value Set bits 48-51 in config register

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