INSPECT

Intra Node Stencil Performance Evaluation Collection

Intel(R) Xeon(R) Platinum 8174 CPU @ 3.10GHz

might be okay...

Julian Hammer says:

The correct way to measure and predict L2-Memory and L3-Memory traffic is unknown.


General

model type Intel Skylake SP processor
model name Intel(R) Xeon(R) Platinum 8174 CPU @ 3.10GHz
micro-architecture SKX
micro-architecture modeler  
cores per socket 24
cores per NUMA domain 24
cacheline size 64 B
clock 2.7 GHz
NUMA domains per socket 1

This machine file was generated for kerncraft version 0.8.1.dev0.

Compiler Flags

icc -O3 -fno-alias -xCORE-AVX512 -qopenmp -qopt-zmm-usage=high -ffreestanding -nolib-inline
clang -O3 -march=skylake-avx512 -D_POSIX_C_SOURCE=200809L -fopenmp -ffreestanding
gcc -O3 -march=skylake-avx512 -D_POSIX_C_SOURCE=200809L -fopenmp -lm -ffreestanding

Flops per Cycle

  ADD MUL FMA total
Single Precission 32 32 64 64
Double Precission 16 16 32 32

Memory Hierarchy

L1

groups 20
cores per group 1
threads per group 2
transfers overlap false

Cache Per Group

sets 64
ways 8
cl_size 64
replacement_policy LRU
write_allocate true
write_back true
load_from L2
store_to L2

Performance Counter Metrics

accesses MEM_INST_RETIRED_ALL_LOADS:PMC[0-3]
misses L1D_REPLACEMENT:PMC[0-3]
evicts L2_TRANS_L1D_WB:PMC[0-3]

L2

groups 20
cores per group 1
threads per group 2
transfers overlap false

Cache Per Group

sets 1024
ways 16
cl_size 64
replacement_policy LRU
write_allocate true
write_back true
load_from None
victims_to L3
store_to L3

Performance Counter Metrics

accesses L1D_REPLACEMENT:PMC[0-3]
misses L2_LINES_IN_ALL:PMC[0-3]
evicts L2_TRANS_L2_WB:PMC[0-3]

L3

groups 1
cores per group 24
threads per group 48
transfers overlap false

Cache Per Group

sets 49152
ways 11
cl_size 64
replacement_policy LRU
write_allocate false
write_back true

Performance Counter Metrics

accesses L2_LINES_IN_ALL:PMC[0-3]
misses (CAS_COUNT_RD:MBOX0C[01] + CAS_COUNT_RD:MBOX1C[01] + CAS_COUNT_RD:MBOX2C[01] + CAS_COUNT_RD:MBOX3C[01] + CAS_COUNT_RD:MBOX4C[01] + CAS_COUNT_RD:MBOX5C[01])
evicts (CAS_COUNT_WR:MBOX0C[01] + CAS_COUNT_WR:MBOX1C[01] + CAS_COUNT_WR:MBOX2C[01] + CAS_COUNT_WR:MBOX3C[01] + CAS_COUNT_WR:MBOX4C[01] + CAS_COUNT_WR:MBOX5C[01])

MEM

cores per group 24
threads per group 48
transfers overlap false

Overlapping Model

Ports:

0, 0DV, 1, 2, 3, 4, 5, 6, 7

Performance Counter Metric

Max(UOPS_DISPATCHED_PORT_PORT_0:PMC[0-3], UOPS_DISPATCHED_PORT_PORT_1:PMC[0-3], UOPS_DISPATCHED_PORT_PORT_4:PMC[0-3], UOPS_DISPATCHED_PORT_PORT_5:PMC[0-3], UOPS_DISPATCHED_PORT_PORT_6:PMC[0-3], UOPS_DISPATCHED_PORT_PORT_7:PMC[0-3])

Non-Overlapping Model

Ports:

2D, 3D

Performance Counter Metric

T_OL + T_L2 + T_L3 + T_MEM

Benchmarks

Kernels

copy

FLOPs per iteration 0
read streams 1 Streams with 8.00 B
write streams 1 Streams with 8.00 B
read+write streams 0 Streams with 0.00 B

daxpy

FLOPs per iteration 2
read streams 2 Streams with 16.00 B
write streams 1 Streams with 8.00 B
read+write streams 1 Streams with 8.00 B

load

FLOPs per iteration 0
read streams 1 Streams with 8.00 B
write streams 0 Streams with 0.00 B
read+write streams 0 Streams with 0.00 B

triad

FLOPs per iteration 2
read streams 3 Streams with 24.00 B
write streams 1 Streams with 8.00 B
read+write streams 0 Streams with 0.00 B

update

FLOPs per iteration 0
read streams 1 Streams with 8.00 B
write streams 1 Streams with 8.00 B
read+write streams 1 Streams with 8.00 B